Hello everyone,
We are a team from ISCAS, and we aim to optimize PyTorch ATen operators on CPUs using RVV. Please refer to the link: #147513.
Meanwhile, the RISE organization is also working on optimizing PyTorch ATen operators for RISC-V:
Optimizing PyTorch ATen Operators for High Performance RISC-V Hardware.
In the near future, more PRs will be submitted upstream. To facilitate subsequent development, we would like to apply to join the PyTorch Slack channel. If possible, please add my domain, zhangfei@iscas.ac.cn, to the PyTorch Slack. Thank you very much!